SANTA CLARA, Calif. -- The current and ongoing downturn has taken a major toll on the semiconductor industry.
But one of the few exceptions to the rule is the semiconductor intellectual-property (IP) business--at least on some fronts. The memory interface IP sector, especially for DRAM, is heating up.
ARM, Denali, Synopsys, Virage and other memory interface IP vendors are now seeing an upswing in business, analysts said. The severe downturn is causing a growing number of OEMs to evaluate or rationalize their internal IP efforts, said Mark Gogolewski, chief technology officer of IP provider Denali Software Inc. (Sunnyvale, Calif.).
The cost of IP development is becoming expensive for OEMs. ''The investments for DRAM interface development have gone up,'' Gogolewski said.
Many OEMs, which never outsourced their chip IP projects in the past, are changing their tunes and mulling over plans to work with the third-party IP vendors, he said.
Denali itself is seeing a sudden swing towards the IP outsourcing trend, especially in the DRAM interface sector. IP outsourcing, coupled by a slight improvement in the economy, is having a positive impact for Denali.
''In Q4, the industry was sitting on its hands,'' Gogolewski told EE Times at the MemCon technology event here. ''Q1 was solid. Q2 is not done yet, but it could be a historical high'' for the IP firm. Denali is a privately-held company. ARM Holdings plc and Synopsys do not break out their IP numbers.
But demand is picking up in IP. In April, IP vendor Virage Logic Corp. said revenue for the second quarter of fiscal 2009 was $11.0 million, compared with $11.3 million for the first quarter and $14.7 million for the second quarter of fiscal 2008. License revenue for the second quarter of fiscal 2009 was $9.1 million, compared with $8.5 million for the prior quarter and $12.1 million for the same period a year ago. For the third quarter fiscal 2009, Virage is projecting revenues of $11.5 million to $12.5 million.
Meanwhile, Denali, one of the DDR-PHY Interface (DFI) specification participating members, also released the official DFI specification version 2.1. The DDR PHY Interface (DFI) specification defines an interface protocol between memory controller logic and PHY interfaces, with a goal of reducing integration costs while enabling performance and data throughput efficiency.
The collaborative technical working group for DFI includes members from ARM, Denali, Intel, LSI, Samsung, and STMicroelectronics.